PART THREE.

PARALLEL PROCESSING

I posted a 'fig -- FORTH INTEREST GROUP' logo on the door of my office. About two years ago, a fellow knocked the door and introduced himself, saying that he saw the poster and was glad to find another Forth enthusiast. He told me that he had programmed in STOIC, which is a early variant of Forth, and was working on a parallel processor project. He also asked me if I would be interested in this project. He spoke in an Eastern European accent, with every vowel and consonant meticulously pronounced. It was not surprising to find out in a short while that he was a Polish mathematician. His name was Wlodzimierz Holsztynski, which I still cannot spell without looking at my notebook.

So, I started working on this parallel processor project. The processor was produced by NCR, with a strange name-- Geometric Arithmetic Parallel Processor-- or GAPP for short. The central processing unit in it was a strange one bit ALU. It was very difficult to think in bits, after cutting the teeth on 8 bit processors, and gradually migrating to 16 bit processors and 32 bit processors. However, Dr. Holsztynski was able to show how complicated problems could be broken down and solved very elegantly using bit-serial algorithms. When you have a very large array of these simple processors working coherently together, suddenly you have a extremely powerful computing structure with the throughput of CRAY supercomputers at a very small fraction of the costs.

After working with him for several months, a colleague told me that he was no less than the inventor of the GAPP chip. No wonder that he was so much at ease in thinking at the bit and gate level. In many ways, Dr. Holsztynski and Chuck Moore are very similar. In their programs, they would not allow a single instruction, even a single bit in an instruction, or a single machine cycle to be wasted by not serving useful function. They are computer poetry in the purest form. These are the people who push the state of the art.

Parallelism seems to be the only way to achieve the computation throughput needed for large and complicated applications. GAPP chip is a very unique way to link a large amount of processing units together with the least amount of silicon and interconnections. In this section I am presenting the limited experience in learning to use it. Lots of material are still under development and are proprietary information. However, what's published here can give us a glimpse of the potential of this technology.

Once we build the processor array and some form of a controller to operate the array, Forth can be of great help in the use and the programming of the processor array. Two papers were presented at the 1987 Rochester Forth Conference, and they are reprinted here showing the status of this parallel processor project. A GAPP array simulator was developed before the array was built, using an image processor to simulator a 512 by 512 GAPP array. Code for this simulator is also included here. GAPP machine code is very similar to bit slice microcontroller code. Forth is a natural language to implement an assembler for GAPP array. The fourth paper in this section shows how to assemble GAPP code.

The last paper is of a different nature. It was a paper I presented at the FPS Array Processor Users Conference in May, 1984 at Denver, Co. It shows how one can put a large floating point math processor under interactive control for program development. It turns a floating point processor into a huge vector stack machine to process large arrays of floating point vectors. This proves two assertions: that Forth can handle floating point numbers in a grand style, and that floating point number is an I/O problem.