CHAPTER 3.

VAX AS A 32 BIT FORTH MACHINE

1.   CISC IS NOT A DIRTY WORD

Currently, CISC (Complicated Instruction Set Computer) seems to be a dirty word while RISC (Reduced Instruction Set Computer) becomes fashionable and popular among the computer scientists. This wind is so strong that many Forth enthusiasts labelled the Novix NC4000 as a RISC computer in order to emphasize the fact that NC4000 executes most of its instructions in a single clock cycle.

It is not the purpose of this paper to argue the merits or demerits of either RISC or CISC.  The purpose is to point out that Forth has a extremely strong CISC flavor, when viewed from the angle of virtual machine and instruction set.  In a Forth application, the instruction set is as complicated as the application, because the instruction set is the collection of all the words making up the application.  Even the Forth kernel, which forms the platform supporting the application, is rather large, containing about 200 words.

The most fundamental property of Forth is its extensibility, that the user can create new instructions and adds them to his Forth system to solve his own problem.  Extensibility is not a property of RISC structure.  CISC structure can be built to include most Forth kernel words and to form a very efficient Forth engine, as in Phil Koopman's WISC (Writable Instruction Set Computer).  The remaining argument is how many instructions are to be implemented in hardware and how many are best left to the software.

2.   MATCHING CISC MACHINES TO FORTH

We can examine available CISC computers and microprocessors and match their instruction sets against the Forth instruction set as defined in Forth-83.  Different machines can thus be ranked as to the ease in implementing a Forth on them.  A partial ranking list is shown in Figure 2:

Figure 2.  Ranking of CISC Machines

        Machine     Comments

        VAX                32 bit, many instructions match high level Forth words.

        NC4000         16 bit optimized Forth engine.

        680x0                           32 bit PDP-11 clone.

        80386                           32 bit ding-dong.

        DP-11                           16 bit stack oriented machine.

        80x86/8088          16 bit ding-dong.

        Z80                             8 bit enhanced ding-dong.

        8080/8085      8 bit ding-dong.

        6502/6800           8 bit first generation micro.

One might be surprise at that VAX is ranked above NC4000. It is true that NC4000 has the architecture best suited for Forth.  However, only the elementary stack operations, the ALU operations, and the subroutine call/return, looping, conditional jump and unconditional jump instructions are implemented as machine instructions.  Other types of more complicated Forth words have to be synthesized from these elementary operations, just like all the other microprocessors.

VAX inherited and expanded on many of the nice features in PDP-11, like byte addressiblity, multiple stack pointers, single instruction multiply and divide, and all the logic and arithmetic operations.  In addition, VAX has a very strong instruction set to handle strings, which is very useful in implementing the Forth interpreter and compiler.  It also handles many different types of data, bits, bytes, 16 bit words, 32 bit long words, 64 bit quad words, 32 bit floating point, and 64 bit floating point.  The 32/64 bit integer and floating point capability makes VAX more like a mainframe than a micro- or mini-computer.

In going through the VAX instruction set, the impression I got was that VAX is not only a good virtual machine for the bare-bone Forth as spelled out in the various Forth standards, it is also a very good virtual machine for F83, which is much more extensive than the bared Forth-83 Standard.  In the next section, let see how the VAX instruction set matches with the F83 kernel instruction set.

3.   VAX AS A F83 ENGINE

VAX is a 32 bit machine, because all the registers are 32 bit wide, and it has an address space of 2**31 bytes.  Since it can access data and operate on them as 16 bit quantities, it is possible to implement the 16 bit F83 faithfully on VAX. However, as the world is moving in the direction of 32 bit machines, we should take the advantage of 32 bit architecture and extend the F83 model to 32 bits.  Here we shall assume that all numbers and addresses are 32 bit quantities unless otherwise specified explicitly.

Listing 5 shows most of the F83 kernel words implemented in the assembly code of VAX.  Most of them were code words in F83, but still a large portion were implemented in high level because the operations are quite complicated.  Many of these high level kernel words can be reduced to very simple code words in VAX, due to the vast and complicated instruction set of VAX.

Figure 3 shows a list of F83 high level kernel words which have corresponding VAX machine instructions or very close approximations. This list is the basis of my claim that VAX is the best host for 32 bit F83.

Figure 3.   F83 Kernel Words and Their VAX Counterparts.

            VAX Machine Code        F83 Words

            MOVL                        Most Stack Words

            MOVZ                        S>D

            CMPL/CMPD               =, >, <, ><, D=, D>, D<

            TSTL/TSTD                   0=, 0>, 0<, D0=, D0>, D0<

            ADDL/ADDD               +, D+

            SUBL/SUBD               -, D-

            INCL/DECL                   1+, 1-

            EMUL                        UM*, D*

            EDIV                        UM/MOD, /MOD, MOD

            DIVL2                       /

            MULL2                       *

            BICL2                       AND, CRESET

            BISL2                       OR, CSET

            XORL2                       XOR, CTOGGLE

            ASHL/ASHD               2*, ?, D2*, D2/

            BEQL                        ZBRANCH

            BR                          BRAMCH

            ACBLEQ                      +LOOP

            AOBLEQ                      LOOP

            CASE                        CASE:

            MOVC3                       CMOVE

            MOVTC                       FILL, ERASE, BLANK, UPPER, DIGIT,

            MOVTUC                      PARSE, WORD

            CMPC3                       COMP, COMPARE

            LOCC                        SCAN

            SKPC                        SKIP

            MATCHC                      SEARCH

The F83 words in Figure 3 can thus be greatly simplified in VAX code, as shown in Listing 5.  There are still some overhead in moving data between the data stack and the CPU registers, which is unavoidable because of the inconsistency between a true stack machine and a register based machine.

Most of the F83 words in VAX code assume that the widths of numbers and addresses are 32 bits.  Double precision words are 64 bit wide.  As the addresses in VAX are byte addresses, VAX is ideally suited to host figForth and its derivatives, including F83, which all assume byte addressability.

Another issue is indirectly threaded code vs. directly threaded code vs. subroutine threaded code.  If we take the subroutine threaded approach, many of the Forth words can be most conveniently coded as in-line machine code.  It is also possible to use the flags in the status register to cause conditional jump or branch, thus reducing IF, ELSE, UNTIL, etc., to single machine instructions.  These approaches are interesting possibilities for us to explore.

4.   CONCLUDING REMARKS

It is interesting to observe that many of the complex instructions in VAX are very useful instructions required by Forth as its primitive instructions.  These instructions are implemented in VAX because of necessity, which are common to all operating systems and languages.  It is nice to see the VAX instruction set underscores many F83 words, confirming that the basic design of F83 is well thought out.

F83 is also capable of being extended towards 32 bit host computers.  The understanding is that numbers and addresses are now 32 bits wide instead 16 bits wide, and that double numbers mean 64 bit numbers.  It can also serve as a testbed in extending Forth standard to the 32 bit world while retain compatibility with the 16 bit models used in old standards.

Forth is a very flexible structure, which can take full advantage of the host processor to build an interactive programming environment for the end user.  It will be more efficient if the host processor can provide more service.  In this sense, CISC computers can be put to good use and we should not hesitate to exploit them.

Listing 5.   Forth kernel in VAX machine code